IBM nanostack architecture
AssessTechniques
A chip architecture IBM says improves compute performance and energy efficiency through stacked design.
Why it's here
Placed in Assess: 1 article(s) of evidence from 1 source(s), led by research breakthroughs, with 0 in the last 30 days. Confidence 24%. Low accumulated evidence, so it defaults conservatively pending more signal.
Evidence (1)
- 8Ars Technica AI·6/25/2026breakthroughIBM Unveils Sub-1 Nanometer Chip Architecture
IBM says its new chip architecture can pack nearly 100 billion transistors onto a fingernail-sized chip, nearly doubling the company’s previous transistor density. The company describes the design as its first sub-1 nanometer chip technology, though it is presented as an architectural leap rather than a literal claim of building reliably functional sub-1 nm features.